1. Technical Field
The present invention relates to a semiconductor memory apparatus, and in particular, to a clock generation circuit and a semiconductor memory apparatus having the same.
2. Related Art
As shown in FIG. 1, a semiconductor memory apparatus includes a data output unit 10 that outputs data Data in response to a clock clk, and a data input unit 20 that receives the data Data in response to the clock clk.
The clock clk is commonly input to the data output unit 10 and the data input unit 20. Further, the clock clk is used by other circuits of the semiconductor memory apparatus. Accordingly, as the number of internal circuits of the semiconductor memory apparatus that use the clock clk becomes large, the clock clk may be distorted from the original waveform.
Meanwhile a high-speed semiconductor memory apparatus requires an increase in clock frequency. Accordingly, a semiconductor memory apparatus using a high-frequency clock is sensitive to the clock as compared with a semiconductor memory apparatus using a low-frequency clock. Therefore, the semiconductor memory apparatus using a high-frequency clock needs to use a stable clock free from distortion. For example, when the data output unit 10 and the data input unit 20 operate in response to a low-frequency clock, the clock used in the past can be used.
However, when the semiconductor memory apparatus uses a high-frequency clock, since the data output unit 10 and the data input unit 20 are sensitive to the clock frequency, in order to prevent an erroneous operation, a stable clock that has no distortion compared with the previously used clock is required.